/*
* 20210107_m32u4_tian_pollin_2.c
*
* Created: 2021-01-07 22:07:56
* Author : uwezi
*/
#include <avr/io.h>
#include <util/delay.h>
#include "i2cmaster.h"
uint8_t adresses[20] = {0x1A,0x1B,0x1C,0x1E,0x1F,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0E,0x0F};
uint8_t hex[16]={'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
void init(void)
{
DDRE = (1 << PE6);
//m_usb_init();
//while(!m_usb_isconnected()); // wait for a connection
i2c_init(1,152);
DDRB = (1 << PB5);
PORTB |= (1 << PB5);
_delay_ms(10);
PORTB &= ~(1 << PB5);
_delay_ms(100);
i2c_start_wait(0x74);
i2c_write(0b00000000); // CO=0 RS=0 last control byte, instruction
// M=0 1-line
// SL=0 1:18 multiplex
// H=0 basic instruction set
i2c_write(0b00100000); // function_set DL=0 M=0 SL=0 H=0
// I_D=1 auto address increment
// S=0 no display shift
i2c_write(0b00000110); // entry_mode I_D=1 S=0
// D=1 display on
// C=1 cursor is on
// B=0 blink is off
i2c_write(0b00001110); // display_ctl D=1 C=0 B=0
i2c_write(0b00100001); // function_set DL=0 M=0 SL=0 H=1
// P=0 column data left-to-right, no mirror
// Q=0 row top-to-bottom, icons in row 17 & 18
i2c_write(0b00000100); // disp_conf P=0 Q=0
// S1=1 S0=0 4x voltage multiplier
i2c_write(0b01000010); // hv_gen S1=1 S0=0
// IM=0 character mode, full display
// IB=0 icon blink disabled, icon data in cgram[0...3] 5x8 bit
// DM=0 direct mode off
i2c_write(0b00001000); // icon_ctl IM=0 IB=0 DM=0
i2c_write(0b10110000); // vlcd_set V=0 VA=0x30
i2c_write(0b11000000); // vlcd_set V=1 VB=0x00
i2c_write(0b00100000); // function_set DL=0 M=0 SL=0 H=0
i2c_write(0b00000001); // clear display
i2c_stop();
}
int main(void)
{
uint8_t j, k;
init();
while(1)
{
// all DDRAM to character #0
i2c_start_wait(0x74);
for (k=0; k<128; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | k); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(0);
}
i2c_stop();
// fill CGRAM
i2c_start_wait(0x74);
for (k=0; k<128; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | (k & 64)); //DDRAM address, highest bit
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b01000000 | (k%64)); //CGRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(0xff);
}
i2c_stop();
_delay_ms(3000);
// all DDRAM to space
i2c_start_wait(0x74);
for (k=0; k<128; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | k); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(0x20);
}
for (k=0; k<8; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | (k & 64)); //DDRAM address, highest bit
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b01000000 | (k%64)); //CGRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(0);
}
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | 0x0d); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(0x00);
for (k=0; k<8; k++)
{
i2c_start_wait(0x74);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[0]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(hex[k/16]);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[1]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(hex[k%16]);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[2]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(':');
for (j=0;j<8;j++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[3]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(j%10 + '0');
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | (k & 64)); //DDRAM address, highest bit
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b01000000 | (k%64)); //CGRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(1 << j);
_delay_ms(1000);
}
}
i2c_stop();
_delay_ms(3000);
// clear CGRAM
i2c_start_wait(0x74);
for (k=0; k<128; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | (k & 64)); //DDRAM address, highest bit
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b01000000 | (k%64)); //CGRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(0);
}
i2c_stop();
i2c_start_wait(0x74);
for (k=0; k<20; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[k]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(k%10+'0');
_delay_ms(500);
}
i2c_stop();
_delay_ms(3000);
_delay_ms(2000);
for (k=0; k<16; k++)
{
i2c_start_wait(0x74);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[0]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(hex[k]);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[1]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write('0');
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[2]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(':');
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[3]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(' ');
for (j=0;j<16;j++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[4+j]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(j+16*k);
}
i2c_stop();
_delay_ms(3000);
}
_delay_ms(2000);
i2c_start_wait(0x74);
for (k=0; k<16; k++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[k+4]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(k);
}
i2c_stop();
for (k=0; k<128; k++)
{
i2c_start_wait(0x74);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[0]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(hex[k/16]);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[1]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(hex[k%16]);
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[2]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(':');
for (j=0;j<8;j++)
{
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | adresses[3]); //DDRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(j%10 + '0');
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b10000000 | (k & 64)); //DDRAM address, highest bit
i2c_write(0b10000000); // one instruction followed by another command
i2c_write(0b01000000 | (k%64)); //CGRAM address
i2c_write(0b11000000); // one data followed by another command
i2c_write(1 << j);
_delay_ms(250);
}
i2c_stop();
}
_delay_ms(2000);
}
return 0;
}
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