MSI 196, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x4, slot 0, IO_Controller, ERR, number 4 --More--   Router# Router#show platform   platform CIU Interrupt info: =================== CIU Int Handler Count Context Level Name 0 0x300C3DD8 0 0x0 IP2 Pow Interrupt 18 0x300CAFCC 1652 0x2 IP3 fpga interrupt 30 0x300C9704 0 0xE IP2 USB 0 Over Current i 31 0x300C9704 0 0xF IP2 USB 1 Over Current g 32 0x3049F75C 0 0x0 IP2 MBOX0 interrupt 33 0x3049F75C 0 0x0 IP2 MBOX1 interrupt 34 0x304C692C 1 0x1 IP4 Aux Port interrupt 35 0x304C692C 4057 0x0 IP4 Console interrupt 40 0x300C9B20 2566 0x0 IP2 MSI 0 interrupt 41 0x300C9B20 0 0x1 IP2 MSI 1 interrupt 42 0x300C9978 0 0x2 IP2 IO-Controller Networ 43 0x300C97D0 1 0x3 IP2 IO-Controller Mgmt/E 46 0x300CA298 2 0x0 IP2 NPEI RML interrupt 52 0x304E1468 10 0x3DAF9C60 IP3 CIU Timer 0 ISR 53 0x304E1468 0 0x21424C04 IP2 CIU Timer 1 ISR 54 0x304E1468 23 0x3DAF9CD4 IP2 CIU Timer 2 ISR 56 0x3052B670 1 0x0 IP2 USB 0 interrupt IP2 Int En: 0x01604F03 C0000001 IP3 Int En: 0x00100000 00040000 --More--  IP4 Int En: 0x0000000C 00000000 Interrupt Counters: =================== Int Level Counter: L1 (netio) 2601, L2 0, L3 (mgmt) 1666, L4 (console) 4072, L5 0, L6 0, l7 (4ms timer) 1286112 CIU IP level int counter: IP2 2601, IP3 1666, IP4 4072 Debug counters/Info: ciu_int2_count 2601, ciu_int3_count 1666, ciu_int4_count 4072 unknown_ip4_int_cnt 0, unreg_int_cnt 0, wdog_int_cnt 0 unreg_int_sum1 0x0, unreg_int_sum2 0x0 spur_timer_int 0, unreg_msi_int_cnt 0 rml_int 2, npei_int 0, usb1_int 1 npei_pcie0_err 0, npei_pcie1_err 0, npei_pcie_timeout 0 fpa_err 0, pip_err 0, ipd_err 0, mio_err 1 l2c_err 0, l2c_int_sum 0x00000000, lmc_err 0 l2d_faddr 0x00000000, l2t_fddr 0x00000000, lmc_faddr 0x00000000 usb 0/1 over current 0/0 pcie0_cfg030 0x0000583F, pcie1_cfg030 0x00000000 pcie0_cfg065 0x00000000, pcie1_cfg065 0x00000000 pcie0_cfg068 0x00000000, pcie1_cfg068 0x00000000 pcie0_cfg071 0x00000000, pcie1_cfg071 0x00000000 --More--   pcie0_cfg072 0x00000000, pcie1_cfg072 0x00000000 pcie0_cfg073 0x00000000, pcie1_cfg073 0x00000000 pcie0_cfg074 0x00000000, pcie1_cfg074 0x00000000 pcie0_cfg076 0x0000005F, pcie1_cfg076 0x00000000 pcie0_dbg_info 0x000000A2, pcie1_dbg_info 0x00000000 fpa_int_sum 0x00000000, pip_err_reg 0x00000000, ipd_int_sum 0x00000000 MSI Interrupt info: =================== MSI 0, name: PSE2 GE RxBD Update, hdlr 0x30450E98, cnt 2497, ctx 0x21C4F8CC, slot 1, SM, NETIO, number 0 MSI 4, name: PSE2 GE TxBD Update, hdlr 0x30450DB8, cnt 68, ctx 0x21C4F8CC, slot 1, SM, NETIO, number 4 MSI 5, name: PSE2 UART Interrupt, hdlr 0x30450E50, cnt 0, ctx 0x21C4F8CC, slot 1, SM, NETIO, number 5 MSI 6, name: PSE2 Misc Event Int, hdlr 0x30451658, cnt 1, ctx 0x21C4F8CC, slot 1, SM, NETIO, number 6 MSI 7, name: PSE2 FPGA Err Inter, hdlr 0x30450E0C, cnt 0, ctx 0x21C4F8CC, slot 1, SM, NETIO, number 7 MSI 128, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x0, slot 0, IO_Controller, NETIO, number 0 MSI 129, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x1, slot 0, IO_Controller, NETIO, number 1 --More--  MSI 130, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x2, slot 0, IO_Controller, NETIO, number 2 MSI 131, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x3, slot 0, IO_Controller, NETIO, number 3 MSI 132, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x4, slot 0, IO_Controller, NETIO, number 4 MSI 133, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x5, slot 0, IO_Controller, NETIO, number 5 MSI 134, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x6, slot 0, IO_Controller, NETIO, number 6 MSI 135, name: wic_mbrd_hdlc_intr, hdlr 0x30792C90, cnt 0, ctx 0x7, slot 0, IO_Controller, NETIO, number 7 MSI 155, name: i2c intr handler, hdlr 0x30A1BDBC, cnt 0, ctx 0x0, slot 0, IO_Controller, NETIO, number 27 MSI 156, name: wic_mbrd_scc_netio_, hdlr 0x307928B4, cnt 0, ctx 0x0, slot 0, IO_Controller, NETIO, number 28 MSI 192, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x0, slot 0, IO_Controller, ERR, number 0 MSI 193, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x1, slot 0, IO_Controller, ERR, number 1 MSI 194, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x2, slot 0, IO_Controller, ERR, number 2 MSI 195, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x3, slot 0, IO_Controller, ERR, number 3 --More--  MSI 196, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x4, slot 0, IO_Controller, ERR, number 4 MSI 197, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x5, slot 0, IO_Controller, ERR, number 5 MSI 198, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 0, ctx 0x6, slot 0, IO_Controller, ERR, number 6 MSI 199, name: wic_mbrd_hdlc_error, hdlr 0x30792934, cnt 1, ctx 0x7, slot 0, IO_Controller, ERR, number 7 MSI 212, name: Hsib Error Monitor , hdlr 0x30A21D4C, cnt 0, ctx 0x0, slot 0, IO_Controller, ERR, number 20 MSI 220, name: wic_mbrd_scc_mgmt_i, hdlr 0x307921D8, cnt 0, ctx 0x0, slot 0, IO_Controller, MGMT, number 28 MSI 221, name: tdm_exception_handl, hdlr 0x30E6AC70, cnt 0, ctx 0x108A0000, slot 0, IO_Controller, ERR, number 29 MSI 222, name: GPIO interrupt hand, hdlr 0x30A1154C, cnt 0, ctx 0x10900200, slot 0, IO_Controller, ERR, number 30 MSI Enable Reg 0: 0x00000000 000000F1 MSI Enable Reg 1: 0x00000000 00000000 MSI Enable Reg 2: 0x00000000 180000FF MSI Enable Reg 3: 0x00000000 701000FF Platform DMA brief information: =============================== --More--  DMA Channel 1: is free. DMA Channel 2: is free. DMA Channel 3: is free. CISCO2911/K9 Network IO Interrupt Throttling: throttle count=10, timer count=10 throttle counts= 10 0 0 0 0 active=0, configured=1 netint usec=20000, netint mask usec=1000 real netint usec=3999, real netint mask usec=200 CPU Registers: Processor Revision ID : 0xD0708 Configuration : 0x8000C48B Status : 0x50009FE1 Cause : 0x0 Count : 0x5E0060E2 Compare : 0x70268D8C WatchLo (0) : 0x0 WatchLo (1) : 0x782DFFBCE6277BD8 WatchHo (0) : 0x80000000 WatchHo (1) : 0x80000000 CacheErr (D) : 0x23C0 --More--   TagLo (I) : 0x441165D8DAA55F02 TagLo (D) : 0x0 DataLo (I) : 0x84002C106004 DataLo (D) : 0xC1 TagHi (D) : 0x0 DataHi (I) : 0x0 DataHi (D) : 0x1 CVM Control : 0xB00003F0 CVM Mem Ctrl : 0x46102 CVM Count : 0x2CEDEDF3A0C MultiCore Dbg : 0x0 CIU PP RST : 0xE CIU MBOX CLRX0 : 0x0 CIU MBOX SETX0 : 0x0 CIU MBOX CLRX1 : 0x0 CIU MBOX SETX1 : 0x0 BOOT_CFG_REG 0 : 0x200B13F1EC0 BOOT_TIM_REG 0 : 0x1000080C0869044 BOOT_CFG_REG 1 : 0x0 BOOT_TIM_REG 1 : 0xFFFFFFFFFFFFFFF BOOT_CFG_REG 2 : 0xB00F1010 BOOT_TIM_REG 2 : 0x180005249560043 BOOT_CFG_REG 3 : 0xB00F1020 --More--   BOOT_TIM_REG 3 : 0x180005249560043 BOOT_CFG_REG 4 : 0xB00F1030 BOOT_TIM_REG 4 : 0x13FFE8208A28186 BOOT_CFG_REG 5 : 0xB00F1040 BOOT_TIM_REG 5 : 0x13FFE8208A28186 BOOT_CFG_REG 6 : 0xB00F1050 BOOT_TIM_REG 6 : 0xBFFC4000722000 BOOT_CFG_REG 7 : 0xB00F1060 BOOT_TIM_REG 7 : 0xBFFC4000722000 On-board SPD data : Size of dimm = 512 Megabytes Memory Type = 0x8 Row Addresses = 0xD Column Address = 0xA Module Rows = 0x60 Data Width = 0x48 Voltage Interface = 0x5 Cycle Time = 0x30 Access Time = 0x45 Configuration Type = 0x2 Refresh Rate/Type = 0x82 --More--  Primary Width = 0x10 Error Width = 0x10 Burst Lengths = 0xC Number of Banks = 0x8 Cas Latency = 0x30 DIMM Mechanical = 0x1 DIMM Type = 0x2 Module Attributes = 0x0 General Attributes = 0x3 Min Cycle Time, CAS of 2 = 0x3D Access Clock Cycle, CAS of 2 = 0x45 Min Cycle Time, CAS of 1 = 0x0 Access Clock Cycle, CAS of 2 = 0x0 Row Precharge = 0x3C Row Active to Row Active = 0x28 RAS CAS Delay = 0x3C Ras Pulse Width = 0x2D Rank Density = 0x80 COM Setup Time = 0x20 COM Hold Time = 0x27 Data Setup Time = 0x10 Data Hold Time = 0x17 COM Setup Time = 0x20 --More--  COM Setup Time = 0x20 COM Setup Time = 0x20 COM Setup Time = 0x20 Write Recovery Time = 0x3C Write to Read Cmd Delay = 0x1E Read to Precharge Delay = 0x1E Probe Characteristics = 0x0 Byte Ext to tRC and tRFC = 0x6 Min Act to Act Refresh = 0x3C Min Refresh to Act Refresh = 0x7F Max Device Cycle Time = 0x80 Device DQS-DQ Skew for DQS = 0x18 Read Data Hold Skew Factor = 0x22 PLL Relock Time = 0x0 Vendor Id = 0000000000000000 Module Part Number = Module Revision Code = 0000 SPD contents (hex): 0x00: 80 08 08 0D 0A 60 48 00 05 30 45 02 82 10 10 00 0x10: 0C 08 30 01 02 00 03 3D 45 00 00 3C 28 3C 2D 80 0x20: 20 27 10 17 3C 1E 1E 00 06 3C 7F 80 18 22 00 00 0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 F9 0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 --More--   0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 DIMM0 SPD data : Size of dimm = 1024 Megabytes Memory Type = 0x8 Row Addresses = 0xE Column Address = 0xA Module Rows = 0x60 Data Width = 0x48 Voltage Interface = 0x5 Cycle Time = 0x30 Access Time = 0x45 Configuration Type = 0x2 Refresh Rate/Type = 0x82 Primary Width = 0x8 Error Width = 0x8 Burst Lengths = 0xC Number of Banks = 0x8 Cas Latency = 0x38 DIMM Mechanical = 0x1 DIMM Type = 0x2 --More--  Module Attributes = 0x0 General Attributes = 0x3 Min Cycle Time, CAS of 2 = 0x3D Access Clock Cycle, CAS of 2 = 0x50 Min Cycle Time, CAS of 1 = 0x50 Access Clock Cycle, CAS of 2 = 0x60 Row Precharge = 0x3C Row Active to Row Active = 0x1E RAS CAS Delay = 0x3C Ras Pulse Width = 0x2D Rank Density = 0x1 COM Setup Time = 0x20 COM Hold Time = 0x28 Data Setup Time = 0x10 Data Hold Time = 0x18 COM Setup Time = 0x20 COM Setup Time = 0x20 COM Setup Time = 0x20 COM Setup Time = 0x20 Write Recovery Time = 0x3C Write to Read Cmd Delay = 0x1E Read to Precharge Delay = 0x1E Probe Characteristics = 0x0 --More--  Byte Ext to tRC and tRFC = 0x6 Min Act to Act Refresh = 0x3C Min Refresh to Act Refresh = 0x7F Max Device Cycle Time = 0x80 Device DQS-DQ Skew for DQS = 0x18 Read Data Hold Skew Factor = 0x22 PLL Relock Time = 0x0 Vendor Id = 7FA8000000000000 Module Part Number = Module Revision Code = 0100 SPD contents (hex): 0x00: 80 08 08 0E 0A 60 48 00 05 30 45 02 82 08 08 00 0x10: 0C 08 38 01 02 00 03 3D 50 50 60 3C 1E 3C 2D 01 0x20: 20 28 10 18 3C 1E 1E 00 06 3C 7F 80 18 22 00 00 0x30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 26 0x40: 7F A8 00 00 00 00 00 00 01 00 00 00 00 00 00 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 01 00 10 03 33 0x60: 60 28 02 53 54 45 43 00 00 00 00 00 00 00 00 00 0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FPA Buffer pools information: FPA INT SUM: 0x0000000000000000, ENB: 0x000000000FFFFFFF FPA CTL STATUS: 0x0000000000004000 FPA QUE(n) AVAILABLE: --More--   QUE(0): 0x00000000000003E8, QUE(1): 0x0000000000000FF8 QUE(2): 0x000000000000001D, QUE(3): 0x0000000000000600 QUE(4): 0x0000000000000000, QUE(5): 0x0000000000000000 QUE(6): 0x0000000000000000, QUE(7): 0x0000000000000000 FPA WART CTL: 0x0000000000000000, STATUS: 0x0000000000000000 FPA QUE(n) PAGE INDEX: QUE(0): 0x000000000000001E, QUE(1): 0x000000000000007F QUE(2): 0x0000000000000000, QUE(3): 0x000000000000002F QUE(4): 0x0000000000000000, QUE(5): 0x0000000000000000 QUE(6): 0x0000000000000000, QUE(7): 0x0000000000000000 FPA QUE EXE: 0x0000000000000000, ACT: 0x0000000000000000 Cavium IPD Registers: IPD_1ST_MBUF_SKP:0x0000000000000000, IPD_NOT_1ST_MBUF:0x0000000000000000 IPD_PKT_MBUF_SZE:0x00000000000000C0, IPD_CTL_STATUS :0x0000000000000209 IPD_WQE_FPA_QUE :0x0000000000000001, IPD_SUB_BP_CNT :0x0000000006000000 IPD_BP_PRT_REDE :0x000000000000000F, IPD_RED_PT_EN2 :0x0000000000000000 IPD_RED_QUE(0)_PARAM :0x0001FF0100000000 IPD_RED_QUE(1)_PARAM :0x0001FF0100000000 IPD_RED_QUE(2)_PARAM :0x0001FF0100000000 IPD_RED_QUE(3)_PARAM :0x0001FF0100000000 IPD_RED_QUE(4)_PARAM :0x0001FF0100000000 IPD_RED_QUE(5)_PARAM :0x0001FF0100000000 --More--   IPD_RED_QUE(6)_PARAM :0x0001FF0100000000 IPD_RED_QUE(7)_PARAM :0x0001FF0100000000 IPD_QOS(0)_RED_MARKS :0x0000010000000000 IPD_QOS(1)_RED_MARKS :0x0000010000000000 IPD_QOS(2)_RED_MARKS :0x0000010000000000 IPD_QOS(3)_RED_MARKS :0x0000010000000000 IPD_QOS(4)_RED_MARKS :0x0000010000000000 IPD_QOS(5)_RED_MARKS :0x0000010000000000 IPD_QOS(6)_RED_MARKS :0x0000010000000000 IPD_QOS(7)_RED_MARKS :0x0000010000000000 Cavium PKO Registers: PKO_MEM_COUNT(0):0x0000000000000000, PKO_MEM_COUNT(1):0x0000000000000000 PKO_MEM_DEBUG(0):0x0000000000000000, PKO_MEM_DEBUG(1):0x0000000000000000 PKO_MEM_DEBUG(10):0x0000000000000000, PKO_MEM_DEBUG(11): 0x0000000000000000 PKO_MEM_DEBUG12: 0x0000000000000000, PKO_MEM_DEBUG13: 0x0000000000000000 PKO_MEM_DEBUG14: 0x0000000000000000, PKO_MEM_DEBUG2: 0x0000000000000000 PKO_MEM_DEBUG3: 0x0000000000000000, PKO_MEM_DEBUG4: 0x0000000000000000 PKO_MEM_DEBUG5: 0x0000000000000000, PKO_MEM_DEBUG6: 0x0000000001000000 PKO_MEM_DEBUG7: 0xF80FE01AA5650000, PKO_MEM_DEBUG8: 0x000000000000003F PKO_MEM_DEBUG9: 0x0000000000000000, PKO_MEM_PORT_PTRS: 0x1FE0000000000000 PKO_MEM_PORT_QOS: 0x1FE0000000000000, PKO_MEM_PORT_RATE0: 0x0000000000000000 PKO_MEM_PORT_RATE1: 0x0000000000000000, PKO_MEM_QUEUE_PTRS: 0xFFE01AA565000000 --More--   PKO_MEM_QUEUE_QOS: 0x1FE0000000000000, PKO_REG_BIST_RESULT: 0x0000000000000000 PKO_REG_CMD_BUF: 0x00000000 0x0020007F, PKO_REG_CRC_ENABLE: 0x0000000000000000 PKO_REG_DEBUG0: 0x0000000000000000, PKO_REG_DEBUG1: 0x0000000000000000 PKO_REG_DEBUG2: 0x0000000000000000, PKO_REG_DEBUG3: 0x0000000000000000 PKO_REG_ENGINE_INFLIGHT: 0x0000004400004444, PKO_REG_ENGINE_THRESH: 0x0000000000000000 PKO_REG_ERROR: 0x0000000000000000, PKO_REG_FLAGS: 0x0000000000000007 PKO_REG_GMX_PORT_MODE: 0x0000000000000002, PKO_REG_INT_MASK: 0x0000000000000000 PKO_REG_QUEUE_MODE: 0x0000000000000000, PKO_REG_QUEUE_PTRS1: 0x0000000000000000 PKO_REG_READ_IDX: 0x0000000000000000 Watchodg information : ==================== L1 watchdog is ON Address = 0x8001070000000500; Value = 0x45F9BA46182 Mode = 2 Length = 17944 (1999 millisec) L2 watchdog is ON - watchdog 0 is used wdog_timer_limit address 0x10900494, value 0x1312D00 UART Information: ============== --More--  AUX (Uart 0) Port Registers: ----------------------- SR: 0x6 IER: 0xD IIR: 0xC1 LCR: 0x7 MCR: 0x3 LSR: 0x60 MSR: 0x0 FCR: 0xC1 TFL: 0x0 RFL: 0x0 Parity Error = 0, Framing Error = 0, Receive Error = 0 Outcount = 0, TotalOut = 39, Incount = 0, Total In = 0 Overrun = 0, Overflow = 0 Brk Character: Received 0, Brk Processed 0 Console (Uart 1) Port Registers: ------------------- SR: 0x6 IER: 0xD IIR: 0xC1 LCR: 0x7 MCR: 0x3 LSR: 0x60 MSR: 0x0 FCR: 0xC1 TFL: 0x0 RFL: 0x0 Parity Error = 0, Framing Error = 0, Receive Error = 0 Outcount = 83, TotalOut = 80979, Incount = 0, Total In = 2525 Overrun = 0, Overflow = 0 Brk Character: Received 0, Brk Processed 0 TLB entries : Entries used: 45 SN Size paddr vaddr perm 0 16MB 0x00000004_10000000:0x00000004_11FFFFFF 0x30000000:0x31FFFFFF 3,O,V 1 16MB 0x00000004_12000000:0x00000004_13FFFFFF 0x32000000:0x33FFFFFF 3,O,V 2 16MB 0x00000004_14000000:0x00000004_15FFFFFF 0x34000000:0x35FFFFFF 3,O,V 3 4MB 0x00000004_16000000:0x00000004_167FFFFF 0x36000000:0x367FFFFF 3,O,V 4 4MB 0x00000004_16800000:0x00000004_16FFFFFF 0x36800000:0x36FFFFFF 3,O,V 5 1MB 0x00000004_17000000:0x00000004_171FFFFF 0x37000000:0x371FFFFF 3,O,V 6 1MB 0x00000004_17200000:0x00000004_173FFFFF 0x37200000:0x373FFFFF 3,O,V 7 64KB 0x00000004_17400000:0x00000004_1741FFFF 0x37400000:0x3741FFFF 3,O,V 8 64KB 0x00000004_17420000:0x00000004_1743FFFF 0x37420000:0x3743FFFF 3,O,V 9 64KB 0x00000004_17440000:0x00000004_1745FFFF 0x37440000:0x3745FFFF 3,O,V 10 4KB 0x00000004_17460000:0x00000004_17461FFF 0x37460000:0x37461FFF 3,O,V 11 4KB 0x00000004_17462000:0x00000004_17463FFF 0x37462000:0x37463FFF 3,O,V 12 4KB 0x00000004_17464000:0x00000004_17465FFF 0x37464000:0x37465FFF 3,W,V 13 4KB 0x00000004_17466000:0x00000004_17467FFF 0x37466000:0x37467FFF 3,W,V 14 16KB 0x00000004_17468000:0x00000004_1746FFFF 0x37468000:0x3746FFFF 3,W,V 15 16KB 0x00000004_17470000:0x00000004_17477FFF 0x37470000:0x37477FFF 3,W,V 16 16KB 0x00000004_17478000:0x00000004_1747FFFF 0x37478000:0x3747FFFF 3,W,V 17 256KB 0x00000004_17480000:0x00000004_174FFFFF 0x37480000:0x374FFFFF 3,W,V 18 256KB 0x00000004_17500000:0x00000004_1757FFFF 0x37500000:0x3757FFFF 3,W,V 19 256KB 0x00000004_17580000:0x00000004_175FFFFF 0x37580000:0x375FFFFF 3,W,V --More--  20 1MB 0x00000004_17600000:0x00000004_177FFFFF 0x37600000:0x377FFFFF 3,W,V 21 4MB 0x00000004_17800000:0x00000004_17FFFFFF 0x37800000:0x37FFFFFF 3,W,V 22 64MB 0x00000004_18000000:0x00000004_1FFFFFFF 0x38000000:0x3FFFFFFF 3,W,V 23 16MB 0x00011B00_10000000:0x00011B00_11FFFFFF 0x10000000:0x11FFFFFF 0,W,V 24 16MB 0x00011E00_12000000:0x00011E00_13FFFFFF 0x12000000:0x13FFFFFF 0,W,V 25 16MB 0x00011C00_18000000:0x00011C00_19FFFFFF 0x18000000:0x19FFFFFF 0,W,V 26 4MB 0x00000000_00000000:0x00000000_007FFFFF 0x20000000:0x207FFFFF 0,O,V 27 4MB 0x00000000_00800000:0x00000000_00FFFFFF 0x20800000:0x20FFFFFF 0,O,V 28 4MB 0x00000000_01000000:0x00000000_017FFFFF 0x21000000:0x217FFFFF 0,W,V 29 4MB 0x00000000_01800000:0x00000000_01FFFFFF 0x21800000:0x21FFFFFF 0,W,V 30 16MB 0x00000000_02000000:0x00000000_03FFFFFF 0x22000000:0x23FFFFFF 0,W,V 31 16MB 0x00000000_04000000:0x00000000_05FFFFFF 0x24000000:0x25FFFFFF 0,W,V 32 16MB 0x00000000_06000000:0x00000000_07FFFFFF 0x26000000:0x27FFFFFF 0,W,V 33 16MB 0x00000000_08000000:0x00000000_09FFFFFF 0x28000000:0x29FFFFFF 0,W,V 34 16MB 0x00000000_0A000000:0x00000000_0BFFFFFF 0x2A000000:0x2BFFFFFF 0,W,V 35 4MB 0x00000000_0C000000:0x00000000_0C7FFFFF 0x2C000000:0x2C7FFFFF 0,W,V 36 4MB 0x00000000_0C800000:0x00000000_0CFFFFFF 0x2C800000:0x2CFFFFFF 0,W,V 37 1MB 0x00000000_0D000000:0x00000000_0D1FFFFF 0x2D000000:0x2D1FFFFF 0,W,V 38 1MB 0x00000000_0D200000:0x00000000_0D3FFFFF 0x2D200000:0x2D3FFFFF 0,W,V 39 1MB 0x00000000_0D400000:0x00000000_0D5FFFFF 0x0D400000:0x0D5FFFFF 0,W,V 40 1MB 0x00000000_0D600000:0x00000000_0D7FFFFF 0x0D600000:0x0D7FFFFF 0,W,V 41 4MB 0x00000000_0D800000:0x00000000_0DFFFFFF 0x0D800000:0x0DFFFFFF 0,W,V 42 16MB 0x00000000_0E000000:0x00000000_0FFFFFFF 0x0E000000:0x0FFFFFFF 0,W,V --More--  43 256MB 0x00000000_80000000:0x00000000_9FFFFFFF 0x40000000:0x5FFFFFFF 0,W,V 44 256MB 0x00000000_A0000000:0x00000000_BFFFFFFF 0x60000000:0x7FFFFFFF 0,W,V 0 = write-thru(wt) 1 = wt, write-allocate, 2 = uncached 3 = non-coherent 4 = coherent, excl, 5 = coh excl on write 6 = coh update on write W = ReadWrite, O = ReadOnly, V = Valid, I = Invalid Platform Support status of Compact Flash: =========================================== CF flash0: Compact Flash plugged in is Supported. CF flash1: Compact Flash not plugged in. LED STATUS: ========== FRONT PANEL LED CONTROL REGISTER -------------------------------- SYSTEM : GREEN ACTIVITY : OFF --More--  POE : OFF RPS : OFF PS : GREEN ISM and CFLASH LED CONTROL REGISTER ----------------------------------- ISM : OFF CF0 : OFF CF1 : OFF DSP LED CONTROL REGISTER ------------------------ PVDM0 : OFF PVDM1 : OFF GE LINK LED, SPEED LED ---------------------- PORT 0 : OFF, 0 (OFF) PORT 1 : OFF, 0 (OFF) PORT 2 : OFF, 0 (OFF) LED CONTROL REGISTER (Value is number of 1/8 seconds ---------------------------------------------------- --More--  ON Time : 3 OFF Time : 3 PAUSE Time : 7 USB CONSOLE LED, RJ45 CONSOLE LED --------------------------------- USB : GREEN RJ45 : OFF Platform Revisions/Versions : =========================== FPGA : 5.02 [Val = 0x502] Board Rev : 2 [Val = 0x204; Type = 4] Env Rev : 4.5 [Val = 0x405, Bit 15 = 0] PSEQ Rev : 3.05 [Val = 0x305] I/O Ctl Nm : GA 1.1 [Val = 0x47410101] I/O Ctl Ver: 2 [Val = 0x20316447] CPU information : --------------- Company ID = 0xD Processor ID = 0x7 --More--  Revision = 0x8 Company OPTs = 0x0 USB Con BL : 1.01 (Boot Loader) USB Con FW : 2.02 (Application Firmware) USB Con FWU: 2.02 (Application Firmware Upgrade) IOS : Cisco IOS Software, C2900 Software (C2900-UNIVERSALK9-M), Version 15.7(3)M8, RELEASE SOFTWARE (fc1) Technical Support: http://www.cisco.com/techsupport Copyright (c) 1986-2021 by Cisco Systems, Inc. Compiled Tue 02-Mar-21 07:51 by prod_rel_team ROMMON (Readonly) : System Bootstrap, Version 15.0(1r)M9, RELEASE SOFTWARE (fc1) Technical Support: http://www.cisco.com/techsupport Copyright (c) 2010 by cisco Systems, Inc. CPU GPIO Register information : ============================= --More--  Data Register 0x8001070000000880 = 0x32B Pin: Config Reg Addr Data TX RX_Xor Int_en Int_type fil_cnt fil_sel 0 : 0x8001070000000800 1 0 0 0 0 0 0 1 : 0x8001070000000808 1 0 0 0 0 0 0 2 : 0x8001070000000810 0 0 1 1 0 0 0 3 : 0x8001070000000818 1 0 0 0 0 0 0 4 : 0x8001070000000820 0 0 0 0 0 0 0 5 : 0x8001070000000828 1 0 0 0 0 0 0 6 : 0x8001070000000830 0 0 0 0 0 0 0 7 : 0x8001070000000838 0 0 0 0 0 0 0 8 : 0x8001070000000840 1 0 0 0 0 0 0 9 : 0x8001070000000848 1 0 0 0 0 0 0 10 : 0x8001070000000850 0 0 0 0 0 0 0 11 : 0x8001070000000858 0 0 0 0 0 0 0 12 : 0x8001070000000860 0 1 0 0 0 0 0 13 : 0x8001070000000868 0 1 0 0 0 0 0 14 : 0x8001070000000870 0 0 1 1 1 0 0 15 : 0x8001070000000878 0 0 1 1 1 0 0 io-controller global register (addr 0x10900400): jtag_id (addr 0x10900400): 0x20316447 revision_id (addr 0x10900404): 0x47410101 diag_echo (addr 0x10900408): 0xFFFFFFFF software_memory_bist (addr 0x1090040C): 0x00000004 five_mhz_prescale (addr 0x10900410): 0x00000072 reset_sampled_inputs (addr 0x10900414): 0x00000008 slew_rate_control_gpio1 (addr 0x10900420): 0x0000FFFF slew_rate_control_gpio0 (addr 0x10900424): 0xFFFFFFFF slew_rate_control_pvdm (addr 0x10900428): 0x000FFFFF slew_rate_control_slowgpio (addr 0x1090042C): 0x0000003F slew_rate_control_wic0 (addr 0x10900430): 0x003FFFFF slew_rate_control_wic1 (addr 0x10900434): 0x003FFFFF slew_rate_control_wic2 (addr 0x10900438): 0x003FFFFF slew_rate_control_wic3 (addr 0x1090043C): 0x003FFFFF wic_spi_control0 (addr 0x10900440): 0x2455FFFF wic_spi_control1 (addr 0x10900444): 0x00000000 io-controller gpio (addr 0x10900200): in_out_config2 (addr 0x10900204): 0x40154415 in_out_config1 (addr 0x10900208): 0x44155105 in_out_config0 (addr 0x1090020C): 0x14504015 polarity_ctrl1 (addr 0x10900210): 0x0000C0C0 --More--   polarity_ctrl0 (addr 0x10900214): 0xC0FFFFC0 debounce_ctrl1 (addr 0x10900218): 0x00000000 debounce_ctrl0 (addr 0x1090021C): 0x00249000 debounce_time5 (addr 0x10900220): 0x00000000 debounce_time4 (addr 0x10900224): 0x00000000 debounce_time3 (addr 0x10900228): 0x00000000 debounce_time2 (addr 0x1090022C): 0x0000C351 debounce_time1 (addr 0x10900230): 0x0000C351 debounce_time0 (addr 0x10900234): 0x00000000 reg_input_value1 (addr 0x10900238): 0x00003A1A reg_input_value0 (addr 0x1090023C): 0x18081038 reg_output_value1 (addr 0x10900240): 0x00000202 reg_output_value0 (addr 0x10900244): 0x00000000 intr_type2 (addr 0x1090024C): 0xEFFFEFFF intr_type1 (addr 0x10900250): 0xEFFFFFFF intr_type0 (addr 0x10900254): 0xFFFEEFFF latch_unlatch_intr1 (addr 0x10900258): 0x00000000 latch_unlatch_intr0 (addr 0x1090025C): 0x00000000 err_intr_status1 (addr 0x10900260): 0x00000000 err_intr_status0 (addr 0x10900264): 0x00000000 mgmt_intr_status1 (addr 0x10900268): 0x00000000 mgmt_intr_status0 (addr 0x1090026C): 0x00000000 ntwk_intr_status1 (addr 0x10900270): 0x00000000 --More--   ntwk_intr_status0 (addr 0x10900274): 0x00000000 err_intr_enable1 (addr 0x10900278): 0x00000000 err_intr_enable0 (addr 0x1090027C): 0x00000000 mgmt_intr_enable1 (addr 0x10900280): 0x00000000 mgmt_intr_enable0 (addr 0x10900284): 0x00000000 ntwk_intr_enable1 (addr 0x10900288): 0x00000000 ntwk_intr_enable0 (addr 0x1090028C): 0x00000000 intr_test1 (addr 0x10900290): 0x00000000 intr_test0 (addr 0x10900294): 0x00000000 slow_output1 (addr 0x109002A0): 0x00000000 slow_output0 (addr 0x109002A4): 0x04000000 slow_input1 (addr 0x109002A8): 0x00000000 slow_input0 (addr 0x109002AC): 0x00000718 slow_shift_reg_config (addr 0x109002B0): 0x0000813E slow_debounce_ctrl1 (addr 0x109002B8): 0x00000000 slow_debounce_ctrl0 (addr 0x109002BC): 0x00000000 slow_debounce_time5 (addr 0x109002C8): 0x00000000 slow_debounce_time4 (addr 0x109002CC): 0x00000000 slow_debounce_time3 (addr 0x109002D0): 0x00000000 slow_debounce_time2 (addr 0x109002D4): 0x00000000 slow_debounce_time1 (addr 0x109002D8): 0x00000000 slow_debounce_time0 (addr 0x109002DC): 0x00000000 slow_func_type (addr 0x109002E0): 0x00000000 --More--   slow_intr_test1 (addr 0x109002E8): 0x00000000 slow_intr_test0 (addr 0x109002EC): 0x00000000 slow_fan_tach (addr 0x109002F0): 0x08080808 slow_ethernet_led_cfg (addr 0x109002F8): 0x00003307 slow_ethernet_led_en (addr 0x109002FC): 0x00000000 slow_intr_type3 (addr 0x10900300): 0xFFFFFFFF slow_intr_type2 (addr 0x10900304): 0xFFFFFFFF slow_intr_type1 (addr 0x10900308): 0xFFFFFFFF slow_intr_type0 (addr 0x1090030C): 0xFFFFFFFF slow_err_intr_event1 (addr 0x10900310): 0x00000000 slow_err_intr_event0 (addr 0x10900314): 0x00000000 slow_mgmt_intr_event1 (addr 0x10900318): 0x00000000 slow_mgmt_intr_event0 (addr 0x1090031C): 0x00000000 slow_ntwk_intr_event1 (addr 0x10900320): 0x00000000 slow_ntwk_intr_event0 (addr 0x10900324): 0x00000000 slow_err_intr_enable1 (addr 0x10900328): 0x00000000 slow_err_intr_enable0 (addr 0x1090032C): 0x00000000 slow_mgmt_intr_enable1 (addr 0x10900330): 0x00000000 slow_mgmt_intr_enable0 (addr 0x10900334): 0x00000000 slow_ntwk_intr_enable1 (addr 0x10900338): 0x00000000 slow_ntwk_intr_enable0 (addr 0x1090033C): 0x00000000 slow_output_polarity_ctrl1 (addr 0x10900340): 0x00000000 slow_output_polarity_ctrl0 (addr 0x10900344): 0x00000000 --More--   slow_input_polarity_ctrl1 (addr 0x10900348): 0x00000000 slow_input_polarity_ctrl0 (addr 0x1090034C): 0x00000000 io-controller hdlc 0 (addr 0x10800000): h_status (addr 0x10800000): 0x00000000 h_edtbar (addr 0x10800004): 0x0E523000 h_idtbar (addr 0x10800008): 0x0E525000 h_cer (addr 0x1080000C): 0x00000000 h_edavnr (addr 0x10800010): 0x00000000 h_ebrr (addr 0x10800014): 0x00000000 h_ipqnr (addr 0x10800018): 0x00000000 h_eer (addr 0x1080001C): 0x00000000 h_ier (addr 0x10800020): 0x00000000 h_ilur (addr 0x10800024): 0x00000000 ca_cr (addr 0x10800028): 0x00000000 h_ccr (addr 0x1080002C): 0x00000000 h_ctrl (addr 0x10800030): 0x0000006F h_imfsr (addr 0x10800034): 0x0000FFFF h_ifser (addr 0x10800038): 0x00000000 h_tdmcr (addr 0x1080003C): 0x0000001B dbg_buf_addr (addr 0x10800100): 0x00000000 dbg_data_lower (addr 0x10800104): 0x00000000 dbg_data_upper (addr 0x10800108): 0x00000000 --More--   h_frm_cnt (addr 0x1080010C): 0x00000000 h_mem_pesr (addr 0x10800110): 0x00000000 h_mem_pecr (addr 0x10800114): 0x0000000F h_emem_buf_pear (addr 0x10800118): 0x00000007 h_imem_buf_pear (addr 0x1080011C): 0x00000057 h_echn_am_pear (addr 0x10800120): 0x00000040 h_ichn_am_pear (addr 0x10800124): 0x0000007C h_parerr_inject (addr 0x10800128): 0x00000000 h_sti_buserr_sts (addr 0x10800200): 0x00000000 h_sti_buserr_ctl (addr 0x10800204): 0x0000007F hdlc_ca_lh (addr 0x10800400 - 0x108005FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ --More--   176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: --More--  hdlc_ca_uh (addr 0x10800600 - 0x108007FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ --More--   352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: io-controller hdlc 1 (addr 0x10810000): h_status (addr 0x10810000): 0x00000000 h_edtbar (addr 0x10810004): 0x0E527000 h_idtbar (addr 0x10810008): 0x0E529000 h_cer (addr 0x1081000C): 0x00000000 h_edavnr (addr 0x10810010): 0x00000000 h_ebrr (addr 0x10810014): 0x00000000 h_ipqnr (addr 0x10810018): 0x00000000 h_eer (addr 0x1081001C): 0x00000000 h_ier (addr 0x10810020): 0x00000000 h_ilur (addr 0x10810024): 0x00000000 --More--   ca_cr (addr 0x10810028): 0x00000000 h_ccr (addr 0x1081002C): 0x00000000 h_ctrl (addr 0x10810030): 0x0000006F h_imfsr (addr 0x10810034): 0x0000FFFF h_ifser (addr 0x10810038): 0x00000000 h_tdmcr (addr 0x1081003C): 0x0000001B dbg_buf_addr (addr 0x10810100): 0x00000000 dbg_data_lower (addr 0x10810104): 0x00000000 dbg_data_upper (addr 0x10810108): 0x00000000 h_frm_cnt (addr 0x1081010C): 0x00000000 h_mem_pesr (addr 0x10810110): 0x00000000 h_mem_pecr (addr 0x10810114): 0x0000000F h_emem_buf_pear (addr 0x10810118): 0x00000007 h_imem_buf_pear (addr 0x1081011C): 0x000000C7 h_echn_am_pear (addr 0x10810120): 0x00000004 h_ichn_am_pear (addr 0x10810124): 0x0000007C h_parerr_inject (addr 0x10810128): 0x00000000 h_sti_buserr_sts (addr 0x10810200): 0x00000000 h_sti_buserr_ctl (addr 0x10810204): 0x0000007F hdlc_ca_lh (addr 0x10810400 - 0x108105FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ --More--   32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ --More--   400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: hdlc_ca_uh (addr 0x10810600 - 0x108107FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ --More--   208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: io-controller hdlc 2 (addr 0x10820000): h_status (addr 0x10820000): 0x00000000 --More--   h_edtbar (addr 0x10820004): 0x0E52B000 h_idtbar (addr 0x10820008): 0x0E52D000 h_cer (addr 0x1082000C): 0x00000000 h_edavnr (addr 0x10820010): 0x00000000 h_ebrr (addr 0x10820014): 0x00000000 h_ipqnr (addr 0x10820018): 0x00000000 h_eer (addr 0x1082001C): 0x00000000 h_ier (addr 0x10820020): 0x00000000 h_ilur (addr 0x10820024): 0x00000000 ca_cr (addr 0x10820028): 0x00000000 h_ccr (addr 0x1082002C): 0x00000000 h_ctrl (addr 0x10820030): 0x0000006F h_imfsr (addr 0x10820034): 0x0000FFFF h_ifser (addr 0x10820038): 0x00000000 h_tdmcr (addr 0x1082003C): 0x0000001B dbg_buf_addr (addr 0x10820100): 0x00000000 dbg_data_lower (addr 0x10820104): 0x00000000 dbg_data_upper (addr 0x10820108): 0x00000000 h_frm_cnt (addr 0x1082010C): 0x00000000 h_mem_pesr (addr 0x10820110): 0x00000000 h_mem_pecr (addr 0x10820114): 0x0000000F h_emem_buf_pear (addr 0x10820118): 0x00000007 h_imem_buf_pear (addr 0x1082011C): 0x0000007F --More--   h_echn_am_pear (addr 0x10820120): 0x00000050 h_ichn_am_pear (addr 0x10820124): 0x0000007C h_parerr_inject (addr 0x10820128): 0x00000000 h_sti_buserr_sts (addr 0x10820200): 0x00000000 h_sti_buserr_ctl (addr 0x10820204): 0x0000007F hdlc_ca_lh (addr 0x10820400 - 0x108205FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ --More--   256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: hdlc_ca_uh (addr 0x10820600 - 0x108207FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ --More--   64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ --More--   432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: io-controller hdlc 3 (addr 0x10830000): h_status (addr 0x10830000): 0x00000000 h_edtbar (addr 0x10830004): 0x0E52F000 h_idtbar (addr 0x10830008): 0x0E531000 h_cer (addr 0x1083000C): 0x00000000 h_edavnr (addr 0x10830010): 0x00000000 h_ebrr (addr 0x10830014): 0x00000000 h_ipqnr (addr 0x10830018): 0x00000000 h_eer (addr 0x1083001C): 0x00000000 h_ier (addr 0x10830020): 0x00000000 h_ilur (addr 0x10830024): 0x00000000 ca_cr (addr 0x10830028): 0x00000000 h_ccr (addr 0x1083002C): 0x00000000 h_ctrl (addr 0x10830030): 0x0000006F h_imfsr (addr 0x10830034): 0x0000FFFF h_ifser (addr 0x10830038): 0x00000000 --More--   h_tdmcr (addr 0x1083003C): 0x0000001B dbg_buf_addr (addr 0x10830100): 0x00000000 dbg_data_lower (addr 0x10830104): 0x00000000 dbg_data_upper (addr 0x10830108): 0x00000000 h_frm_cnt (addr 0x1083010C): 0x00000000 h_mem_pesr (addr 0x10830110): 0x00000000 h_mem_pecr (addr 0x10830114): 0x0000000F h_emem_buf_pear (addr 0x10830118): 0x00000007 h_imem_buf_pear (addr 0x1083011C): 0x000000C7 h_echn_am_pear (addr 0x10830120): 0x00000004 h_ichn_am_pear (addr 0x10830124): 0x0000007C h_parerr_inject (addr 0x10830128): 0x00000000 h_sti_buserr_sts (addr 0x10830200): 0x00000000 h_sti_buserr_ctl (addr 0x10830204): 0x0000007F hdlc_ca_lh (addr 0x10830400 - 0x108305FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ --More--   112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ 288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ --More--   480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: hdlc_ca_uh (addr 0x10830600 - 0x108307FF): 0: 00000000 00000000 00000000 00000000 ................ 16: 00000000 00000000 00000000 00000000 ................ 32: 00000000 00000000 00000000 00000000 ................ 48: 00000000 00000000 00000000 00000000 ................ 64: 00000000 00000000 00000000 00000000 ................ 80: 00000000 00000000 00000000 00000000 ................ 96: 00000000 00000000 00000000 00000000 ................ 112: 00000000 00000000 00000000 00000000 ................ 128: 00000000 00000000 00000000 00000000 ................ 144: 00000000 00000000 00000000 00000000 ................ 160: 00000000 00000000 00000000 00000000 ................ 176: 00000000 00000000 00000000 00000000 ................ 192: 00000000 00000000 00000000 00000000 ................ 208: 00000000 00000000 00000000 00000000 ................ 224: 00000000 00000000 00000000 00000000 ................ 240: 00000000 00000000 00000000 00000000 ................ 256: 00000000 00000000 00000000 00000000 ................ 272: 00000000 00000000 00000000 00000000 ................ --More--   288: 00000000 00000000 00000000 00000000 ................ 304: 00000000 00000000 00000000 00000000 ................ 320: 00000000 00000000 00000000 00000000 ................ 336: 00000000 00000000 00000000 00000000 ................ 352: 00000000 00000000 00000000 00000000 ................ 368: 00000000 00000000 00000000 00000000 ................ 384: 00000000 00000000 00000000 00000000 ................ 400: 00000000 00000000 00000000 00000000 ................ 416: 00000000 00000000 00000000 00000000 ................ 432: 00000000 00000000 00000000 00000000 ................ 448: 00000000 00000000 00000000 00000000 ................ 464: 00000000 00000000 00000000 00000000 ................ 480: 00000000 00000000 00000000 00000000 ................ 496: 00000000 00000000 00000000 00000000 ................ 512: io-controller hdlc 4 (addr 0x10840000): h_status (addr 0x10840000): 0x00000000 h_edtbar (addr 0x10840004): 0x0E533000 h_idtbar (addr 0x10840008): 0x0E535000 h_cer (addr 0x1084000C): 0x00000000 h_edavnr (addr 0x10840010): 0x00000000 h_ebrr (addr 0x10840014): 0x00000000 --More--   POWER CONSTANT AND MAX_POWER DETAILS ===================================== Motherboard power constant = 125 Motherboard maximum power = 39.1 W Service-module slot = 1: power constant =BE3, max_power = 50 ETHSW_SM POE power consumption = 0.0 W PVDM3 Max Power consumption = 0.0 W Platform EHWIC Switch TCAM Software information: Router#