declare register AR(15:0), DR(19:0), IR(3:0), SP(15:0), TEMP(15:0), PC(15:0);
declare memory MEM(AR,DR);
INIT:	PC <- 0, AR <- 0, SP <- $FFFF, DR <- 0, TEMP <- 0;	# c0
FETCH:	AR <- PC;				# c1
	read MEM;				# c2
	PC <- PC + 1,				# c3
	IR <- DR(19:16) |			# c4
		switch IR { case 0: goto PUSH	# k0
			case 1: goto POP	# k1
			case 2: goto SUB	# k2
			case 3: goto NOT	# k3
			case 4: goto JNZ	# k4
			default: goto FETCH };
PUSH:	AR <- DR(15:0),				# c5
	SP <- SP - 1;				# c6
	read MEM,				# c2
	AR <- SP;				# c7
	write MEM | goto FETCH;			# c8
POP:	AR <- SP,				# c7
	if SP <> $FFFF then			# k6
		SP <- SP + 1			# c9
	fi;
	read MEM,				# c2
	AR <- DR(15:0);				# c5
	write MEM | goto FETCH;			# c8
SUB:	AR <- SP,				# c7
	SP <- SP + 1;				# c9
	read MEM,				# c2
	AR <- SP;				# c7
	TEMP <- DR(15:0),			# cA
	read MEM;				# c2
	TEMP <- TEMP - DR(15:0);		# cB
	DR(15:0) <- TEMP;			# cC
	write MEM | goto FETCH;			# c8
NOT:	AR <- SP;				# c7
	read MEM;				# c2
	TEMP <- not DR(15:0);			# cD
	DR(15:0) <- TEMP;			# cC
	write MEM | goto FETCH;			# c8
JNZ:	AR <- SP,				# c7
	SP <- SP + 1;				# c9
	read MEM;				# c2
	TEMP <- DR(15:0);			# cA
	if TEMP <> 0 then goto JNZ1 fi;		# k7
	SP <- SP + 1 | goto FETCH;		# c9
JNZ1:	AR <- SP,				# c7
	SP <- SP + 1;				# c9
	read MEM;				# c2
	PC <- DR(15:0) | goto FETCH;		# cE