No-Register Assembly Language General Concept An extremely minimal assembly language based on a hypothetical processor with no internal registers. All memory is external to the processor Addresses are 16 bit, stored big endian Memory is 8 bits Instructions use 0, 1, or 2 memory references m1 - first memory reference, updated with result of operation m2 - second memory reference xxx m1 m2 - 3 letter mnemonic separated with spaces Program listings are understood to be in hex It’s okay to write self-modifying code (maybe even necessary) # comment with ‘#’ as first character in a line Addressing Modes Implied : (brk, nop, ret) Absolute : 2 byte address, 10f0 (14 other instructions) Immediate: 1 byte, 2a: (sto) Memory: 0000 - ffff Program Counter: 0000 - 0001 (initialized to 0200) Carry Flag: 0002 Zero Flag: 0003 Top of Stack 0004 Stack 0005 - 00ff Display Memory: 0100 - 01ff, 32 x 8, 256 bytes Start of program memory: 0200 Instructions Op Code Mnemonic Example Description (flags affected) 00 brk brk Halt program (none) 01 add add 110a 2f00 m1 = m1 + m2 (CZ) 02 and and dead beef m1 = m1 & m2 (Z) 03 jmp jmp 100f program counter = m1 (none) 04 jpc jpc 0600 if Carry flag = 1: PC = m1 (none) 05 jpz jpz 070e if Zero flag = 1: PC = m1 (none) 06 jsr jsr 20a0 push PC, inc Top of stack, PC = m1 (none) 07 mov mov 0616 b00b m1 = m2 (Z) 08 nop nop place holder (none) 09 not not 04ed m1 = not m1 (Z) 0a orr orr de05 de80 m1 = m1 | m2 (Z) 0b pop pop 1100 pop top of stack into m1 (none) 0c psh psh 1100 push m2 onto top of stack (none) 0d ret ret pop PC from stack (none) oe shl shl 3c07 shift bits left: C<7<6<5<4<3<2<1<0<zero (C) 0f shr shr 3c07 shift bits right: zero>7>6>5>4>3>2>1>C (C) 10 sto sto 3c07 33 store m1 with m2(immediate) (Z) 11 sub sub de05 de80 m1 = m1 - m2 (CZ) 12 inc inc 1000 m1 += 1 (CZ) 13 dec dec 1000 m1 -= 1 (CZ) created on iOS Pages, iPad Pro
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